Application Engineer II: Silicon Signoff and Verification

As a Senior Application Engineering Silicon Signoff and Verification member, you will be part of the Silicon Signoff and Verification (SSV) team. The SSV team works with the Quantus, Pegasus and Voltus platforms.

Responsibilities

• Helping customers to adopt and proliferate our IC Signoff solutions
• Conducting technical presentations, technical training, and product demonstrations, including development of customized presentations
• Supporting technical evaluations and benchmarks
• Help R&D and product engineers develop competitive and creative technical solutions

Skills & Qualifications

• Complete Bachelors in Electrical, Electronics, System Engineering, computer science or related areas
• MOS transistors, Physical verification flows (i.e. DRC, LVS & FILL), Parasitic extraction flows, IR Drop/Electromigration tools, Physical verification rule writing
• Excellent written and verbal communication skills
• Interest in learning new technologies
• Open to continued personal development to meet the evolving demands of the EDA industry
• Experience in scripting languages such as Tcl/Perl/Python is a must
• Team player with a positive attitude, willingness to offer and execute ideas and solutions to enhance processes within an evolving environment

Experience

• Nice to have: Industry Physical Design experience
• Prior experience with IC digital implementation flows and front-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking
• Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus or ICC, ICC2, DC or Primetime is highly desired
• Experience with advanced nodes

Benefits

• Competitive benefits